Semiconductor transistors, in particular field-effect controlled switching devices such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or an Insulated Gate Bipolar Transistor (IGBT) have been used for various applications including but not limited to use as switches in power supplies and power converters, electric cars, air-conditioners, and even stereo systems. Particularly with regard to power devices capable of switching large currents and/or operating at higher voltages, low on-state resistance Ron and high breakdown voltages Ubd are often desired.
For this purpose charge-compensation semiconductor devices were developed. The compensation principle is based on a mutual compensation of charges in n- and p-doped zones in the drift region of a vertical MOSFET.
Typically, the charge-compensation structure formed by p-type and n-type zones is arranged below the actual MOSFET-structure with source, body regions and gate regions, and also below the associated MOS-channels which are arranged next to one another in the semiconductor volume of the semiconductor device or interleaved in one another in such a way that, in the off-state, their charges can be mutually depleted and that, in the activated state or on-state, there results an uninterrupted, low-impedance conduction path from a source electrode near the surface to a drain electrode arranged on the back side.
By virtue of the compensation of the p-type and n-type dopings, the doping of the current-carrying region can be significantly increased in the case of compensation components which results in a significant reduction of the on-state resistance Ron despite the loss of a current-carrying area. The reduction of the on-state resistance Ron of such semiconductor power devices is associated with a reduction of the heat loss, so that such semiconductor power devices with charge-compensation structure remain “cool” compared with conventional semiconductor power devices.
Meanwhile, switching losses of semiconductor devices become more important. Depending on device operation, output charge QOSS and electric energy EOSS, respectively, stored in the space charge region formed in the off-state and during reverse bias, respectively, mainly determine the switching losses. The stored charge QOSS of semiconductor devices with charge-compensation structures may be comparatively high. This may result in significant switching losses EOSS. In addition to enable reverse blocking, the output charge QOSS (at specific blocking voltage) has to be completely removed which results in switching delays.
In many applications, semiconductor transistors such as MOSFETs are mainly exposed to reverse voltages which are significantly below a rated blocking voltage of the semiconductor device. For example, conventional vertical compensation MOSFETs are often used in circuits with a designed circuit voltage during nominal operation which results in a nominal reverse voltages Uc of only about 30% to about 70% of the rated blocking voltage Ubd, for example to about 400 V for a rated blocking voltage of 650 V. Furthermore, the conventional compensation MOSFETs are typically designed such that the pn-compensation structure is already substantially depleted in the horizontal direction at comparatively low reverse voltages corresponding to about only 10% of nominal reverse voltages Uc or even less to reduce stored electric energy EOSS. Even further, the stored charge QOSS is mainly determined by the charge Qh corresponding to the horizontally depletion of conventional compensation structures. Accordingly, there is typically a trade-off between on-resistance Ron and stored charge QOSS in conventional compensation MOSFETs. This may be expressed as Ron*QOSS=Ron*Qh=const. Thus, there is typically a trade-off between forward current losses and switching losses in conventional compensation MOSFETs.
Even when taking into account typical voltage spikes, a MOSFET is typically exposed to reverse voltages which are significantly below rated breakdown voltage Ubd during normal operation. Higher values may result from unanticipated switching events which occur only rarely. The depletable semiconductor volume of conventional compensation MOSFETs corresponds however to at least 100% of the rated blocking voltage. Accordingly, conventional compensation MOSFETs are typically “oversized” with respect to the stored charge QOSS.
Accordingly, there is a need to improve semiconductor devices with charge-compensation structures.